Dimensions / Weight
| W | H | D | |
|---|---|---|---|
| Dimensions | 214 mm (8.43 inch) | 81 mm (3.19 inch) | 340 mm (13.39 inch) |
PID Insulation Tester
TOS7210S
TOS7210S
360,000円 （税込：396,000円）
- Capable of setting within the range of 50Vdc to 2000Vdc (resolution 1V)
- Ability to switch the applied voltage polarity instantly by the switch on the front panel
- The output is floating from the ground potential.
- Capable of measuring the current value between measurement points.
This product generates high voltage! The use of this product requires knowledge of electricity.Improper handling or operation of this product can be very dangerous, so be sure to read the instruction manual carefully and use this product properly.
*Discontinued and only available while supplies last
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Features
The PID insulation tester (TOS7210S) is designed based on the insulation resistance tester (TOS7200) to carry out the evaluation of the PID (Potential Induced Degradation) effect of the PV module precisely and efficiently. Being equipped with the output ability of 2000V and the ammeter with nA resolution as well as a polarity switching function, the TOS7210S is also applicable not only to the PID evaluation but also the evaluation of the insulators that requires a high sensitivity of measurement. The tester is equipped with the panel memory that is externally accessible and RS232C interface as standard; it can be flexibly compatible with the automated system.
PID effect
The PID effect is a phenomenon that the amount of power generation by a cell remarkably decreases when high voltage is applied between the solar cell and the frame for long hours. It is supposed that the higher the applied voltage is and/or the higher and more humid the environment is, the further deterioration accelerates. For example, the potential difference in the string becomes extremely higher when the number of sheets that are connected in series increases even if the output voltage of the crystalline silicon solar cell module is just tens of volts. On the other hand, the grounding methods of the PCS (Power Conditioning System) that connects to the system as an AC power supply varies according to the type of PCS. In recent years, the transformerless method, where the input side is in the floating method (the negative polarity is not connected to the ground) is increasing. In this case, a high potential difference occurs between the cell and the ground. Regarding the crystalline silicon solar cell module, it is proved that the cell having a higher negative electric potential than that of the frame (ground) easily causes the PID effect. (See Fig. 1) The PV modules are currently managed with the maximum system of voltage as 600V in Japan and 1000V in Europe. There is a market trend that the maximum voltage of the commercial mega solar system is raised from the perspective of reducing the number of the strings and the total number of the PCS, and improving the efficiency of power generation.
![PID effect [Fig. 1]](https://kikusui.co.jp/kiku/wp-content/uploads/2021/02/TOS7210S-fig03.jpg)
![PID effect [Fig. 2]](https://kikusui.co.jp/kiku/wp-content/uploads/2021/02/TOS7210S-fig04.jpg)
Figure 2 shows the simulation of a crystalline silicon solar cell module being exposed to a high potential difference. It is considered that, in the PID effect of the crystalline silicon solar cell module, the sodium ion in the white tempered plate glass moves to the side of the cell and then causes the deterioration. (The PID ef fec t of the thin f ilm solar cell module is also confirmed, however, the mechanism of the deterioration is different from that of the crystalline silicon solar cell module.) The cause of the PID effect is currently being tested with and researched by various research organizations.
Features
Capable of arbitrary setting of the output voltage
You can set the test voltage that is applied to the DUT within the range of 50 Vdc to 2000 Vdc (resolution 1V). In addition, an insulation resistance test of the electricity/electronic components or the electricity/electronic devices is also possible besides the voltage specified in JIS C 1302:1994. In the range of 50V to 1000V, the output properties are complied to JIS C 1302:1994.
The output is floating from the ground.
The output terminal is floating from the ground electric potential. *1 In addition, a shield cable is adopted as an output cable. Therefore, it can be measured only an electric current flowing between test points excluding the one between the DUT and the ground, and it realizes to conduct the highly-sensitiveand precise evaluation.
*1: Ground voltage of the terminal that polarity is set as an anode (±1000 Vdc) Ground voltage of the terminal that polarity is set as a cathode (+1000 Vdc and -3000 Vdc)
Polarity switching function
You can easily change the output polarity by the switch on the front panel. The PID deterioration is a reversible phenomenon that may recover after the reverse bias voltage is applied. The polarity switching is a convenient function that can avoid a wiring change that connects to the DUT. In addition, switching by the external control through the RS232C interface is also possible.
Analog output terminal
In the resistance display mode, the voltage depending on the measured resistance is logarithmically compressed and output within the range of 0V to 4V. In the current display mode, the current is output in a linear scale depending on the measured current and ranges of measurement (4 ranges). You can analyze the changes or the deterioration status of the DUT by using an external recording device such as the data logger.
Specifications
| 出力部 | ||
| 出力電圧 | 範囲 | 50V～2000V |
| 分解能 | 1V | |
| 確度 | ±(1.5% of setting ＋2V) | |
| 最大定格出力 | 2W (2000V/1mA) | |
| 最大定格電流 | 1mA | |
| 出力端子 | 出力形式 | フローティング |
| 対接地電圧 | ±1000 Vdc (極性が正極に設定されている端子） ＋1000 Vdcおよび－3000 Vdc (極性が負極に設定されている端子） | |
| リップル | 2000V無負荷 | 20Vp-p以下 |
| 最大定格負荷 | 20Vp-p以下 | |
| 電圧変動率 | 1%以下 (最大定格負荷→無負荷） | |
| 短絡電流 | 2mA以下 (瞬時200mA以下) | |
| 出力立ち上がり時間 | 50ms以下 (10%～90%、無負荷) | |
| 放電機能 | 試験終了時に強制放電 (放電抵抗20kΩ) | |
| 電圧計 | ||
| 測定範囲 | 0V～2400V | |
| 分解能 | 1V | |
| 確度 | ±(1% of reading ＋1V) | |
| 抵抗計 | ||
| 測定範囲 | 0.01MΩ～5000MΩ(100nAを超え最大定格電流1mAまでの範囲にて） | |
| 表示 | □.□□MΩ [R＜10.0MΩ] □□.□MΩ [10.0MΩ≦R＜100.0MΩ] □□□MΩ [100.0MΩ≦R＜1000MΩ] □□□□MΩ [1000MΩ≦R≦5000MΩ] (R=絶縁抵抗測定値) | |
| 確度※1 | ±(10% of reading) [100nA＜i≦200nA] | |
| ±(5% of reading) [200nA＜i≦1μA] | ||
| ±(2% of reading) [1μA＜i≦1mA] | ||
| (i =出力電圧測定値/抵抗測定値) | ||
| 測定レンジ | 選択 | 電流測定レンジをAUTOかFIXに選択可 |
| AUTO | 抵抗測定用電流値に応じて電流測定レンジを随時自動的に変更 | |
| FIX | 出力電圧設定値とLOWER設定値により電流測定レンジを固定(W COMP OFFにて) | |
| ホールド機能 | 試験終了時の抵抗値をPASS期間中ホールド | |
| 電流計 | ||
| 測定範囲 | 0.000μA～1900μA | |
| 表示 | □.□□□μA [i＜10.00μA] □□.□□μA [10.00μA≦i＜100.0μA] □□□.□μA [100.0μA≦i＜1000μA] □□□□μA [1000μA≦i] (i=電流測定値) | |
| 確度※2 | ±(4% of reading +0.005μA) [i＜10.00μA] ±(4% of reading +0.005μA) [10.00μA≦i＜100.0μA] ±(2% of reading ＋0.005μA) [100.0μA≦i＜1000μA] (2% of reading) [1000μA≦i] (i=電流測定値) | |
| 測定レンジ | 選択 | 電流測定レンジをAUTOかFIXに選択可 |
| AUTO | 電流測定値に応じて電流測定レンジを随時自動的に変更 | |
| FIX | 出力電圧設定値とLOWER設定値により電流測定レンジを固定(W COMP OFFにて) | |
| 判定機能 | ||
| 判定方法/判定動作 | LOWER FAIL 判定 | 下限基準値以下の抵抗値を検出した場合に出力を遮断しLOWER FAILと判定 |
| W COMP 判定 | 上限基準値以上または下限基準値以下の抵抗値を検出した場合に出力を遮断しUPPERもしくはLOWER FAILと判定するウィンドコンパレート判定 | |
| 時間 | ||
| 試験時間設定範囲 | 0.5s～999s (TEST TIME OFFを設定すると連続運転可能） | |
| 判定待ち時間設定範囲 | 0.3s～10s (TEST TIME ＞ WAIT TIME) | |
| 確度 | ±(100ppm＋20ms) | |
| ||
| SIGNAL I/O | 後面パネルD-SUB 25ピンコネクタ | ||
| 入力仕様 | ハイレベル 入力電圧 | 11V～15V | 入力信号は全てローアクティブ制御 入力端子は抵抗により＋12Vにプルアップ 入力端子の開放はハイレベルを入力したのと等価 |
| ローレベル 入力電圧 | 0V～4V | ||
| ローレベル 入力電流 | 最大 －5mA | ||
| 入力時間幅 | 最少 5ms | ||
| 出力仕様 | 出力方式 | オープンコレクタ出力 (4.5Vdc～30Vdc) | |
| 出力耐電圧 | 30Vdc | ||
| 出力飽和電圧 | 約1.1V (25℃） | ||
| 最大出力電流 | 400mA (TOTAL) | ||
| ANALOG OUT | 抵抗測定値、電流測定値および電圧、電流レンジ情報を直流電圧で出力。 | ||
| 抵抗測定値 |  Rx:(1MΩ: 0.3V、10MΩ: 1.04V、100MΩ: 2.00V、1000MΩ: 3.00V、10000MΩ以上 : 4.00V) 出力インピーダンス1kΩ | ||
| 電流測定値 | Renge1 : V0[V] = 測定値 [μA] /512 Renge2 : V0[V] = 測定値 [μA] /64 Renge3 : V0[V] = 測定値 [μA] /8 Renge4 : V0[V] = 測定値 [μA] | ||
| COM | アナログ出力回路コモン | ||
| 確度 | ±(2% of FS) | ||
| RS232C | 後面パネルD-SUB 9 ピンコネクタ (EIA-232-Dに準拠) POWERスイッチ、KEYLOCK以外の全機能がリモートコントロール可能 | ||
| ボーレート | 9600/19200/38400 bps(データ : 8bit、パリティ : なし、ストップビット: 2bitは固定) | ||
| REMOTE | 前面パネル6ピンMin DINコネクタ オプションのリモートコントローラRC01-TOSまたはRC02-TOSを接続して、 スタート/ストップをリモートコントロール（ただし、変換アダプタが必要） | ||
| 表示 | 7セグメントLED、電圧表示4桁、絶縁抵抗値表示4桁、電流値表示4桁、時間表示3桁 | ||
| メモリー機能 | 最大10通りの試験条件をメモリー可能 | ||
| TEST MODE | MOMENTARY | STARTスイッチを押している間のみ試験を実行 | |
| FAIL MODE | リモートコントロールのストップ信号によるFAILの解除を無効にする | ||
| DOUBLE ACTION | STOPスイッチを押し、離してから約0.5秒以内にSTARTスイッチを押したときのみ試験を開始 | ||
| PASS HOLD | PASSの判定を保持する時間を0.2秒、またはHOLDに設定可能 | ||
| KEYLOCK | START/STOP以外のキー操作を受け付けない状態に移行 | ||
| 環境 | |||
| 設置場所 | 屋内、高度2000mまで | ||
| 仕様保証範囲 | 温度／湿度 | 15℃～30℃／20%rh ～80rh (ただし、結露なきこと） | |
| 動作範囲 | 温度／湿度 | 0℃～40℃／20%rh～80rh(ただし、結露なきこと） | |
| 保存範囲 | 温度／湿度 | ー20℃～70℃／90%rh以下(ただし、結露なきこと） | |
| 電源 | |||
| 交渉電圧範囲(許容電圧範囲） | 100Vac～240Vac(85Vac～250Vac) | ||
| 消費電力 | 定格負荷時 | 最大30VA | |
| 許容周波数範囲 | 47Hz～63Hz | ||
| 絶縁抵抗 | 30MΩ以上 (500Vdc) (AC LINE －シャーシ間) | ||
| 耐電圧 | 1500Vac、1分間10mA以下（ACLINE－シャーシ間）、3000Vac、1分間(A、B端子－シャーシ間） | ||
| 接地連続性 | 25Aac/0.1Ω以下 | ||
| 外形寸法／質量 | W : 214mm、H : 81mm (Max 115mm)、Dmm : 340mm (Max385mm)／約2kg | ||
| 付属品 | 電源コード×1本、高電圧テストリードTL51-TOS（1.5m）×1組、セットアップガイド×1冊、クイックリファレンス×1枚、安全のために×1冊、高電圧危険シール×1枚、CD-ROM×1枚 | ||
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Information related to PID test
Reference: National Institute of Advanced Industrial Science and Technology
Test on the PID effect
The experiment to reproduce the PID effect was conducted as the collaborative research theme in “Stage II Consortium of high-reliability PV module development and evaluation” that was established in April 2011 by the Research Center of Photovoltaic Technologies, National Institute of Advanced Industrial Science and Technology (hereinafter called “AIST”). Kikusui Electronics Corp. developed TOS7210S as a necessary test equipment contributed for this experiment project.
Creation of the single cell module
The 6-inch polycrystalline silicon cell of the test module is laminated, as a unit cell module, with white tempered glass, ethylene vinyl acetate (sealing material), and back sheet.
Materials used for a solar battery module
- Cell substrate: 6-inch polycrystalline silicon cell
- Light-receiving glass: White tempered glass
- Sealing material: Ethylene vinyl acetate (EVA)
- Back sheet: PVF/PET/PVF constituted back sheet
Test method
We installed the light receiving surface of the glass covered with an aluminum board in a constant temperature chamber and connected it to the PID insulation tester TOS7210S.
We then kept the module temperature at 85°C and applied -1000 Vdc, -1500 Vdc, and -2000 Vdc to each of three pieces of the single cell modules.
Confirmation of the output characteristics by the solar simulator
An output drop can be confirmed with the initial (Pmax/F.F./Isc/Voc) characteristics of the module and the changes with the elapsed time.
Confirmation of the deterioration by EL (electro-luminescence)
The normal par t emits light per fectly, but as the deterioration accelerates, the shaded area increases eventually and ceases to emit light. This method is adopted useful to confirm the PID effect. In addition, it is admitted that the deterioration in the PID effect is reduced with the elapled time by a reversible effect or recovered nearly to the initial state.
Confirm the difference in deterioration by applied voltage
The ratio that the maximum electricity (Pmax) of the module decreases when the applied voltage increases. In addition, as the EL image indicates, the higher the applied voltage becomes, the shaded area in the EL image increases in the same interval.
Recovery examination and the results by applying the reverse voltage
In the PID effect after conducting the reversible effect test, it may be found that the deterioration is reduced or rec over nearly to the initial state in some module by being lef t or t he rever se volt age is being applied. The polarity can be easily changed in TOS7210S with the switch. You are not bothered by the complicated connection to the DUT. The module that the Pmax drops remarkably (less than -99 %), and the recovery is not confirmed even after applying voltage for long hours. On the other hand, the module that the Pmax drops moderately (approximately -53 % to -71 %) recovered almost perfectly in 0.5 to two hours. In addition, it canbe recovered regardless of the applied voltage.
Recovery of the sample that output drops by -99 % and less in the PID experiment
Recovery of the sample that output drops by -65 % to -71 % and less in the PID experiment
Recovery of the sample that output drops by -53 % to -58 % and less in the PID experiment
Various evaluation methods
Under the present conditions, any of the evaluation test method or the standard are not established. Each of the research organizations, experiment stations, and module manufacturers in the various countries conducting its own evaluation.
- Water method : Method to apply the water on the module glass surface and apply the voltage
- Chamber method : Method to manage temperature and humidity in the temperature chamber and apply the voltage
- Aluminum method : Method to cover the glass with an aluminum foil or let an aluminum board adhere to the glass surface, and apply the voltage
We continue experiments in each test method to examine each superiority and inferiority, difference by the temperature or humidity for future standardization. The international standard IEC is devising the test method for the PID effect.
